ERCTool
Software prototype for Electrical Rule Checking (ERC) on integrated circuits at transistor level. Developped during my post doc, along with Oussama Oulkaid, CIFRE PhD candidate. Due to the industrial context, the software is not distributed online.

QECE (Quick Exploration using Chisel Estimators)
Framework which allows the users to define adaptable estimation methodologies for digital circuits, and flexible design space exploration strategies.

QECE-benchmark
Benchmark of FPGA representative applications, used to demonstrate the usability of QECE on various use cases.

PhD manuscript - Université Grenoble Alpes
LaTeX sources for the generation of my PhD dissertation.